I have a PL design in which I included a 10G/25G Ethernet Subsystem IP core from Xilinx configured with BASE-KR, AN/LT logic and FEC logic for Clause 74. When I try to generate the bitstream, I am getting this error:
[Common 17-69] Command failed: This design contains one or more cells for which bitstream generation is not permitted:<encrypted cell> (<encrypted cellview>)system_i/xxv_ethernet_0/inst/i_system_xxv_ethernet_0_0_top_1/i_system_xxv_ethernet_0_0_ANLT_WRAPPER/i_AN_PCONTROL (<encrypted cellview>)<encrypted cell> (<encrypted cellview>)system_i/xxv_ethernet_0/inst/i_system_xxv_ethernet_0_0_top_0/i_system_xxv_ethernet_0_0_ANLT_WRAPPER/i_AN_PCONTROL (<encrypted cellview>)If a new IP Core license was added, in order for the new license to be picked up, the current netlist needs to be updated by resetting and re-generating the IP output products before bitstream generation.I already tried to Reset Output Products, but it did not help. I only get this error when I enable BASE-KR, AN/LT logic and FEC logic. When I only enable BASE-R, it builds successfully. I am using the trial licenses. I have checked the 10G/25G Ethernet Subsystem documentation, and I have included all licenses which are mentioned. I have attached a picture which shows all my licenses.
What should I do to make it generate the bitstream successfully?
